Security for FPGAs in the Cloud

Departments: Electrical Engineering
Time: Thursday, October 24, 2019 - 10:30am - 11:30am
Type: Seminar Series
Presenter: Russell Tessier; Professor of Electrical and Computer Engineering, University of Massachusetts Amherst
Room/Office: Dunham 107
Location:
J. Robert Mann, Jr. Engineering Student Center
10 Hillhouse
New Haven, CT 06511
United States
See map: Google Maps

Department of Electrical Engineering Seminar Series

Russell Tessier
Professor of Electrical and Computer Engineering 
Associate Dean of Graduate Studies in the College of Engineering at the University of Massachusetts Amherst

“Security for FPGAs in the Cloud"

Abstract: As FPGA use becomes more diverse, the shared use of these devices becomes a security concern. Multi-tenant FPGAs that contain circuits from multiple independent sources or users will soon be prevalent in cloud and embedded computing environments. The recent discovery of information leakage between neighboring long wires in FPGAs can reveal secrets. Additional research has shown that malicious power wasting circuits can affect device supply voltage and induce operational faults.

In this talk, we discuss the following thrusts related to FPGA security in the cloud. First, we present on-chip measurements showing the existence of long-wire coupling. Toward this end, we propose a useful metric for quantifying the coupling, and show that the coupling can be used to infer the layout of wires in an FPGA channel. We show how the coupling can be exploited to exfiltrate an entire 128-bit AES key from an 8-bit AES datapath. The receiver captures the information leaked from the wire over many encryptions.

Second, we demonstrate the adverse effects of implementing large numbers of power wasting circuits inside an FPGA. It is shown that these circuits can cause significant instantaneous drops in FPGA supply voltage that is proportional to the distance from the circuits. Experiments using Arria 10 and Cyclone V devices are demonstrated.

Bio: Russell Tessier is a Professor of Electrical and Computer Engineering and Associate Dean of Graduate Studies in the College of Engineering at the University of Massachusetts Amherst. He received SM and Ph.D. degrees from the Massachusetts Institute of Technology in Cambridge, MA. Prof. Tessier is the head of the Reconfigurable Computing Group at UMass. He has published over 120 papers on FPGAs and reconfigurable computing and he worked at the Altera Toronto Technology Centre in 2005. He was a co-founder of Virtual Machine Works, an FPGA-based logic emulation company. The company was acquired by Mentor Graphics which currently markets the emulation product as its Veloce brand.

Hosted by: Professor Jakub Szefer

Thursday, October 24, 2019
Mann Student Center
10:30 AM